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kr, Neeraj, , R.K.Singh, Pattanaik, Manisha (2011) Design and Analysis of a Novel Low-Power SRAM Bit-Cell Structure at Deep-Sub-Micron CMOS Technology for Mobile Multimedia Applications. International Journal of Advanced Computer Science and Applications, 2. doi:10.14569/ijacsa.2011.020507

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Reference TypeJournal (article/letter/editorial)
TitleDesign and Analysis of a Novel Low-Power SRAM Bit-Cell Structure at Deep-Sub-Micron CMOS Technology for Mobile Multimedia Applications
JournalInternational Journal of Advanced Computer Science and Applications
Authorskr, NeerajAuthor
, R.K.SinghAuthor
Pattanaik, ManishaAuthor
Year2011Volume2
PublisherThe Science and Information Organization
DOIdoi:10.14569/ijacsa.2011.020507Search in ResearchGate
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Mindat Ref. ID10368745Long-form Identifiermindat:1:5:10368745:4
GUID0
Full Referencekr, Neeraj, , R.K.Singh, Pattanaik, Manisha (2011) Design and Analysis of a Novel Low-Power SRAM Bit-Cell Structure at Deep-Sub-Micron CMOS Technology for Mobile Multimedia Applications. International Journal of Advanced Computer Science and Applications, 2. doi:10.14569/ijacsa.2011.020507
Plain Textkr, Neeraj, , R.K.Singh, Pattanaik, Manisha (2011) Design and Analysis of a Novel Low-Power SRAM Bit-Cell Structure at Deep-Sub-Micron CMOS Technology for Mobile Multimedia Applications. International Journal of Advanced Computer Science and Applications, 2. doi:10.14569/ijacsa.2011.020507
In(n.d.) International Journal of Advanced Computer Science and Applications Vol. 2. The Science and Information Organization

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Kr. Shukla, Neeraj, K. Singh, R., Pattanaik, Manisha (2011) A Novel Approach to Reduce the Gate and Subthreshold Leakage in a Conventional SRAM BitCell Structure at DeepSub Micron CMOS Technology. International Journal of Computer Applications, 23. 23-28 doi:10.5120/2899-3796
Yadav, Jyoti, Kr Shukla, Neeraj, Bhatnagar, Pulkit, Birla, Shilpi (2015) Design and Analysis of a Novel Ultra-Low Power SRAM Bit-Cell at 45nm CMOS Technology for Bio-Medical Implants. International Journal of Computer Applications, 115. 1-6 doi:10.5120/20248-2615
Kr.Shukla, Neeraj (2011) Analysis of the Effect of Temperature Variations on Sub-threshold Leakage Current in P3 and P4 SRAM Cells at Deep Sub-micron CMOS Technology. International Journal of Computer Applications, 35. 8-13 doi:10.5120/4395-6101
L, S, N., Dr. (2011) Very Low Power Viterbi Decoder Employing Minimum Transition and Exchangeless Algorithms for Multimedia Mobile Communication. International Journal of Advanced Computer Science and Applications, 2. doi:10.14569/ijacsa.2011.021205
Kr.Shukla, Neeraj, Birla, Shilpi, Rathi, Kapil, R.K.Singh, Author, Pattanaik, Manisha (2011) Analysis of the Effect of Temperature and Vdd on Leakage Current in Conventional 6TSRAM BitCell at 90nm and 65nm Technology. International Journal of Computer Applications, 26. 44-48 doi:10.5120/3065-4189
Goswami, Toshiyanka, Yadav, Jyoti, Birla, Shilpi, Kr. Shukla, Neeraj (2013) Effect of Supply Voltage on Ability and Stability in IP3 SRAM Bit-Cell at 45nm CMOS Technology using N-Curve. International Journal of Computer Applications, 83. 16-17 doi:10.5120/14532-2929
Kr.Shukla, Neeraj, Birla, Shilpi, Dembla, Saksham (2012) Analysis of Subthreshold Leakage Current in IP3 SRAM Bit-Cell under Temperature Variations in Deep-Submicrometer CMOS Technology. International Journal of Computer Applications, 51. 1-4 doi:10.5120/8147-0272
AYED, Amine, GHARIANI, Hamadi (2017) Low Power Low Jitter 0.18 CMOS Ring VCO Design with Strategy based on EKV3.0 Model. International Journal of Advanced Computer Science and Applications, 8. doi:10.14569/ijacsa.2017.081219
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Chen, Zhixin (2011) Design and Implementation on a Sub-band based Acoustic Echo Cancellation Approach. International Journal of Advanced Computer Science and Applications, 2. doi:10.14569/ijacsa.2011.020606
 
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