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Li, Peng-Cheng, Xiao-Rong, Luo, Luo, Yin-Chun, Zhou, Kun, Shi, Xian-Long, Zhang, Yan-Hui, Lv, Meng-Shan (2015) An ultra-low specific on-resistance trench LDMOS with a U-shaped gate and accumulation layer. Chinese Physics B, 24. 47304pp. doi:10.1088/1674-1056/24/4/047304

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Reference TypeJournal (article/letter/editorial)
TitleAn ultra-low specific on-resistance trench LDMOS with a U-shaped gate and accumulation layer
JournalChinese Physics B
AuthorsLi, Peng-ChengAuthor
Xiao-Rong, LuoAuthor
Luo, Yin-ChunAuthor
Zhou, KunAuthor
Shi, Xian-LongAuthor
Zhang, Yan-HuiAuthor
Lv, Meng-ShanAuthor
Year2015 (April)Volume24
PublisherIOP Publishing
DOIdoi:10.1088/1674-1056/24/4/047304Search in ResearchGate
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Mindat Ref. ID6006088Long-form Identifiermindat:1:5:6006088:8
GUID0
Full ReferenceLi, Peng-Cheng, Xiao-Rong, Luo, Luo, Yin-Chun, Zhou, Kun, Shi, Xian-Long, Zhang, Yan-Hui, Lv, Meng-Shan (2015) An ultra-low specific on-resistance trench LDMOS with a U-shaped gate and accumulation layer. Chinese Physics B, 24. 47304pp. doi:10.1088/1674-1056/24/4/047304
Plain TextLi, Peng-Cheng, Xiao-Rong, Luo, Luo, Yin-Chun, Zhou, Kun, Shi, Xian-Long, Zhang, Yan-Hui, Lv, Meng-Shan (2015) An ultra-low specific on-resistance trench LDMOS with a U-shaped gate and accumulation layer. Chinese Physics B, 24. 47304pp. doi:10.1088/1674-1056/24/4/047304
In(n.d.) Chinese Physics B Vol. 24. IOP Publishing

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