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Xiao-Rong, Luo, Yuan-Gang, Wang, Hao, Deng, Udrea, Florin (2010) A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer. Chinese Physics B, 19. 77306pp. doi:10.1088/1674-1056/19/7/077306

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Reference TypeJournal (article/letter/editorial)
TitleA novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer
JournalChinese Physics B
AuthorsXiao-Rong, LuoAuthor
Yuan-Gang, WangAuthor
Hao, DengAuthor
Udrea, FlorinAuthor
Year2010 (July)Volume19
PublisherIOP Publishing
DOIdoi:10.1088/1674-1056/19/7/077306Search in ResearchGate
Generate Citation Formats
Mindat Ref. ID6000515Long-form Identifiermindat:1:5:6000515:5
GUID0
Full ReferenceXiao-Rong, Luo, Yuan-Gang, Wang, Hao, Deng, Udrea, Florin (2010) A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer. Chinese Physics B, 19. 77306pp. doi:10.1088/1674-1056/19/7/077306
Plain TextXiao-Rong, Luo, Yuan-Gang, Wang, Hao, Deng, Udrea, Florin (2010) A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer. Chinese Physics B, 19. 77306pp. doi:10.1088/1674-1056/19/7/077306
In(n.d.) Chinese Physics B Vol. 19. IOP Publishing

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